Field-programmable
gate-arrays (FPGAs) have evolved to include embedded memory, high-speed
I/O interfaces and processors, making them both more efficient and
easier-to-use for compute acceleration and networking applications.
However, implementing on-chip communication is still a designer's burden
wherein custom system-level buses are implemented using the
fine-grained FPGA logic and interconnect fabric. Instead, we propose
augmenting FPGAs with an embedded network-on-chip (NoC) to implement
system-level communication. We design custom interfaces to connect a
packet-switched NoC to the FPGA fabric and I/Os in a configurable and
efficient way and then define the necessary conditions to implement
common FPGA design styles with an embedded NoC. Four application case
studies highlight the advantages of using an embedded NoC. We show that
access latency to external memory can be ~1.5× lower. Our application
case study with image compression shows that an embedded NoC improves
frequency by 10-80%, reduces utilization of scarce long wires by 40% and
makes design easier and more predictable. Additionally, we leverage the
embedded NoC in creating a programmable Ethernet switch that can
support up to 819 Gb/s-5× more switching bandwidth and 3× lower area
compared to previous work. Finally, we design a 400 Gb/s NoC-based
packet processor that is very flexible and more efficient than other
FPGA-based packet processors.
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