Dark
silicon refers to the phenomenon that a fraction of a many-core chip
has to become “dark” or “dim” in order to guarantee the system to be
kept in a safe temperature range and allowable power budget. Techniques
have been developed to selectively activate non-adjacent cores on
many-core chip to avoid temperature hotspot, while resulting unexpected
increase of communication overhead due to the longer average distance
between active cores, and in turn affecting application performance and
energy efficiency, when Network-on-Chip (NoC) is used as a scalable
communication subsystem. To address the brand-new challenges brought by
dark silicon, in this paper, we present FoToNoC, a Folded Torus-like
NoC, coupled with a hierarchical management strategy for heterogeneous
many-core systems. On top of it, objectives of maximizing application
performance, energy efficiency and chip reliability are isolated and
well achieved by hardware-software co-design in several different
phases, including application mapping and scheduling, cluster management
and DVFS control. Evaluations on PARSEC benchmark applications
demonstrate the significance of the entire strategy. Compared with
state-of-the-art approaches, the proposed FoToNoC organization can
achieve on average 35.4 and 35.2 percent on communication efficiency and
application performance improvement, respectively, when maintaining the
safe chip temperature. The hierarchical cluster-based management
strategy can further reduce an average 34.6 percent of the total energy
consumption with a notable reduction on the chip peak temperature. The
significant achievements on system energy efficiency and the reduction
on chip temperature of H.264 decoder and DSP-stone benchmarks
additionally verify the effectiveness of the proposed methods.
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